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LabVIEW FPGA Series Part 1: Creating a Simple Adder

The LabVIEW FPGA module is a great tool if you want to learn how to program FPGAs.  For the most basic project, you can create a simple “Adder” that on each clock cycle reads 2 input values from a control, and writes the sum to an indicator.  There is a video at the bottom of this post if you don’t want to read through everything.

Step 1 – Start LabVIEW 2015

Self-explanatory, but you should see the following splash screen:

LabVIEW 2015 Splash

Followed by the following screen asking you to create a project or to open a project:

LabVIEW Create Project

Step 2 – Create a Project

Click on the “Create Project” button, and the following screen will appear, select “Blank Project”

Create LabVIEW Project

and you end up with something like this:

Blank LabVIEW Project

Save the project file now, (create a new directory somewhere and save the project file in there)

04_saveproject

Select Project Name

Step 3 – Add FPGA Target (NI PXIe-6592R High-Speed Serial)

Right click on “My Computer” that is visible from inside the LabVIEW project window, select “New->Targets and Devices…”

Add FPGA Target

Now you should see two options at the top, if you have the hardware plugged in and already set up, you can use the top option, if you have the hardware plugged in somewhere else and are only doing development on the current machine, select the bottom option “New target or device”, and the window below will show you all devices that you have the drivers installed for.  For this example, I am selecting the PXIe-6592R

Select High-Speed Serial (NI PXIe-6592R)

Now your project will look like this:

LabVIEW Project with FPGA Target

Any vi that you create under the “FPGA Target” node, has to be written using LabVIEW FPGA, and will run on the FPGA, anything under the “My Computer” node will run on your computer.  Now you can place multiple vi’s under the FPGA Target node, but for each “Build Specification” that you create, you can only have one top-level vi.  Each build specification will end up creating 1 bitfile.  If your vi references or uses other vi’s, those dependencies will automatically be included in your bitfile.  This way you can have one top-level vi that uses other vi’s in the same project.  This comes handy when you have a complex application that you want to have wrapper test vis around.

Step 4 – Create an FPGA VI

Right-click on the “FPGA Target” and select “New->Vi”

Save VI

Saved VI

Save VI

Name the VI

Now save this vi, and you have a blank FPGA project! Now that’s good, what about the Adder part?

Step 5 – Create a Single-Cycle Timed Loop

Now you can place a bunch of controls, indicators and logic inside the FPGA, but if you do not put it inside of a loop, that code will execute only once.  We want to be able to keep using the Adder that is inside the FPGA over and over again, so we will place the logic inside of a loop.  The default speed of a LabVIEW FPGA loop is 40 MHz.  You can increase the speed, but I recommend you start creating your application at 40MHz, and as your performance requirements increase to also increase the loop speed.  Also note that after a certain speed, you will have to make a choice between how much you do on each clock cycle and how much logic you put in there.

So right-click on the background of the Block Diagram and select the following:

Programming->Structures->Timed Structures->Timed Loop

Create Single Cycle Timed Loop

Drag your mouse and make sure the loop takes up a good amount of space:

Place Single Cycle Timed Loop

Place Single Cycle Timed Loop

Now create the logic using regular LabVIEW controls and indicators.  (I left the gory details out for this step, as the intended audience is users with some LabVIEW experience, so if the details would have helped you, please leave a comment and I will add them here.)

Place Controls and Indicators

On the block diagram, wire them up as so:

Wire Them Up

Step 6 – Run in Simulation Mode

Right click on the FPGA Target, and select “Simulation (Simulated I/O)”:

Set Simulation Mode

And click “Run” on the Front Panel and the FPGA is now running in simulation mode!

Change the values in the controls, and watch the value in the indicator change.  Note that simulation mode runs a lot slower than when running on the actual FPGA target.

Run in Simulation Mode

Video

Watch the following video for a quick demonstration on how to create a simple LabVIEW FPGA project with a single-cycle timed loop that has 2 controls and 1 indicator that displays the sum of the values written to the controls.  The video also includes a demonstration for compiling the vi to a bitstream and for running it on live FPGA hardware.

Download Code:

www.quantprogrammer.com/Code/SampleProject.zip

The LabVIEW FPGA module is a great tool if you want to learn how to program FPGAs.  For the most basic project, you can create a simple “Adder” that on each clock cycle reads 2 input values from a control, and writes the sum to an indicator.  There is a video at the bottom of this post if you don’t want to read through everything.

Step 1 – Start LabVIEW 2015

Self-explanatory, but you should see the following splash screen:

LabVIEW 2015 Splash

Followed by the following screen asking you to create a project or to open a project:

LabVIEW Create Project

Step 2 – Create a Project

Click on the “Create Project” button, and the following screen will appear, select “Blank Project”

Create LabVIEW Project

and you end up with something like this:

Blank LabVIEW Project

Save the project file now, (create a new directory somewhere and save the project file in there)

04_saveproject

Select Project Name

Step 3 – Add FPGA Target (NI PXIe-6592R High-Speed Serial)

Right click on “My Computer” that is visible from inside the LabVIEW project window, select “New->Targets and Devices…”

Add FPGA Target

Now you should see two options at the top, if you have the hardware plugged in and already set up, you can use the top option, if you have the hardware plugged in somewhere else and are only doing development on the current machine, select the bottom option “New target or device”, and the window below will show you all devices that you have the drivers installed for.  For this example, I am selecting the PXIe-6592R

Select High-Speed Serial (NI PXIe-6592R)

Now your project will look like this:

LabVIEW Project with FPGA Target

Any vi that you create under the “FPGA Target” node, has to be written using LabVIEW FPGA, and will run on the FPGA, anything under the “My Computer” node will run on your computer.  Now you can place multiple vi’s under the FPGA Target node, but for each “Build Specification” that you create, you can only have one top-level vi.  Each build specification will end up creating 1 bitfile.  If your vi references or uses other vi’s, those dependencies will automatically be included in your bitfile.  This way you can have one top-level vi that uses other vi’s in the same project.  This comes handy when you have a complex application that you want to have wrapper test vis around.

Step 4 – Create an FPGA VI

Right-click on the “FPGA Target” and select “New->Vi”

Save VI

Saved VI

Save VI

Name the VI

Now save this vi, and you have a blank FPGA project! Now that’s good, what about the Adder part?

Step 5 – Create a Single-Cycle Timed Loop

Now you can place a bunch of controls, indicators and logic inside the FPGA, but if you do not put it inside of a loop, that code will execute only once.  We want to be able to keep using the Adder that is inside the FPGA over and over again, so we will place the logic inside of a loop.  The default speed of a LabVIEW FPGA loop is 40 MHz.  You can increase the speed, but I recommend you start creating your application at 40MHz, and as your performance requirements increase to also increase the loop speed.  Also note that after a certain speed, you will have to make a choice between how much you do on each clock cycle and how much logic you put in there.

So right-click on the background of the Block Diagram and select the following:

Programming->Structures->Timed Structures->Timed Loop

Create Single Cycle Timed Loop

Drag your mouse and make sure the loop takes up a good amount of space:

Place Single Cycle Timed Loop

Place Single Cycle Timed Loop

Now create the logic using regular LabVIEW controls and indicators.  (I left the gory details out for this step, as the intended audience is users with some LabVIEW experience, so if the details would have helped you, please leave a comment and I will add them here.)

Place Controls and Indicators

On the block diagram, wire them up as so:

Wire Them Up

Step 6 – Run in Simulation Mode

Right click on the FPGA Target, and select “Simulation (Simulated I/O)”:

Set Simulation Mode

And click “Run” on the Front Panel and the FPGA is now running in simulation mode!

Change the values in the controls, and watch the value in the indicator change.  Note that simulation mode runs a lot slower than when running on the actual FPGA target.

Run in Simulation Mode

Video

Watch the following video for a quick demonstration on how to create a simple LabVIEW FPGA project with a single-cycle timed loop that has 2 controls and 1 indicator that displays the sum of the values written to the controls.  The video also includes a demonstration for compiling the vi to a bitstream and for running it on live FPGA hardware.

Download Code:

www.quantprogrammer.com/Code/SampleProject.zip

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