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Category: FPGA

LabVIEW FPGA – Static RAM – Part 1

Here is a quick overview of how to use Static RAM with the LabVIEW FPGA Module:

You first have to declare a piece of Static RAM, to do this you have 2 options:

Option 1 – Declare an FPGA global Static RAM

Right-click on the FPGA target, and select “New->Memory”

01_add_memory

The default options are fine, I chose to rename my RAM to “My_SRAM”, and to set the number of cycles of read latency to 1. (The default option was 2)

02_add_memory_options

Here is what the project looks like after adding FPGA global Static RAM:

03_project_with_sram

Option 2 – Declare FPGA vi-scoped Static RAM

From an FPGA vi, right click and select  “Data Storage & Transfer->VI-Defined Memory Configuration”04_vi_scoped_add_memory

And you will see the following on your Block Diagram:

05_vi_scoped_memory

Double-click on it and you will see the same options as before.  Rename it and set the # of cycles of read latency to 1.

 

After you have added some Static RAM to your project, you will be able to either Read from the memory, or write to it.  Additionally, you should only read or write to it from one place each, and to do both operations from inside a Single-Cycle Timed Loop.  (Note: Yes, you can do it from outside these locations, but I do not recommend that a newbie do so.)

The VI to use for both reading and writing can be accessed from the “Data Storage & Transfer” palette.  It is called “Memory Method Node”.  You right-click on it and select between “Read” and “Write”.  You also have to wire in a reference to the SRAM.  The reference can be from a Constant, where you can pick the FPGA global SRAM from a combox, or it can be a wire from the VI-defined SRAM.

07_select_ram

Now the Write method contains 2 input terminals, one for the Address, and one for the data. Memory addresses, are indexed starting with 0, and the data type wired in should match the data type defined in the memory configuration.  See here, for what is probably the most simple LabVIEW FPGA SRAM example in the world:

08_vi_snippet_sram_example

note: The above is also a VI snippet, which means you can drag and drop it directly into a VI and it will produce the appropriate code for you!

You can see the source code on github here:

https://github.com/JohnStratoudakis/LabVIEW_Fpga/tree/master/SRAM/01_SRAM_Simple

You can also download a zip file from here:

http://quantprogrammer.com/Code/01_SRAM_Simple.zip

Here is a quick overview of how to use Static RAM with the LabVIEW FPGA Module: You first have to declare a piece of Sta...

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Installing the Tools for Communicating with LabVIEW FPGA using the C Interface API

If you use the LabVIEW FPGA module to create a bitfile that can run on a piece of National Instruments hardware

Now that I have already demonstrated how to use LabVIEW for Windows to communicate with the NI PXIe-6592R board, I will demonstrate how to do the same thing using C++ on Windows with the free Microsoft Visual Studio 2015 Community edition. But first things first, we have to download the FPGA C interface API and Visual Studio 2015 Community Edition.

To download the installer for Microsoft Visual Studio 2015 Community Edition go here:

https://www.visualstudio.com/vs/community/

To download the National Instruments FPGA Interface C API v15.0 (goes with LabVIEW 2015)

http://www.ni.com/download/fpga-interface-c-api-15.0/5601/en/

Videos

See this video for installing Visual Studio 2015 Community Edition:

and see this video for installing the FPGA C Interface API:

If you use the LabVIEW FPGA module to create a bitfile that can run on a piece of National Instruments hardware Now that...

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LabVIEW FPGA Series Part 3: Using LabVIEW for Windows to call the FPGA with FIFOs

In this video, I use LabVIEW for Windows to call the FPGA and transfer the data in by using a Host-to-Target DMA FIFO, and a Target-to-Host DMA FIFO to get the result back to the LabVIEW for Windows application.

You can download the sample code here:

http://www.quantprogrammer.com/Code/SampleProject_DMA.zip

In this video, I use LabVIEW for Windows to call the FPGA and transfer the data in by using a Host-to-Target DMA FIFO, a...

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LabVIEW FPGA Series Part 2: Using LabVIEW for Windows to call the FPGA

Part 1 showed how to create a LabVIEW FPGA project, add an FPGA target, create a VI and run it in simulation mode.  Now I will go over how to call this FPGA VI from the host computer.  This will come in handy when you have a larger program running on the FPGA.  For the purposes of this example we will use a simple adder.

 

Video

You can download the sample code here:

http://www.quantprogrammer.com/Code/SampleProject_Controls.zip

Part 1 showed how to create a LabVIEW FPGA project, add an FPGA target, create a VI and run it in simulation mode.  Now...

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LabVIEW FPGA Series Part 1: Creating a Simple Adder

The LabVIEW FPGA module is a great tool if you want to learn how to program FPGAs.  For the most basic project, you can create a simple “Adder” that on each clock cycle reads 2 input values from a control, and writes the sum to an indicator.  There is a video at the bottom of this post if you don’t want to read through everything.

Step 1 – Start LabVIEW 2015

Self-explanatory, but you should see the following splash screen:

LabVIEW 2015 Splash

Followed by the following screen asking you to create a project or to open a project:

LabVIEW Create Project

Step 2 – Create a Project

Click on the “Create Project” button, and the following screen will appear, select “Blank Project”

Create LabVIEW Project

and you end up with something like this:

Blank LabVIEW Project

Save the project file now, (create a new directory somewhere and save the project file in there)

04_saveproject

Select Project Name

Step 3 – Add FPGA Target (NI PXIe-6592R High-Speed Serial)

Right click on “My Computer” that is visible from inside the LabVIEW project window, select “New->Targets and Devices…”

Add FPGA Target

Now you should see two options at the top, if you have the hardware plugged in and already set up, you can use the top option, if you have the hardware plugged in somewhere else and are only doing development on the current machine, select the bottom option “New target or device”, and the window below will show you all devices that you have the drivers installed for.  For this example, I am selecting the PXIe-6592R

Select High-Speed Serial (NI PXIe-6592R)

Now your project will look like this:

LabVIEW Project with FPGA Target

Any vi that you create under the “FPGA Target” node, has to be written using LabVIEW FPGA, and will run on the FPGA, anything under the “My Computer” node will run on your computer.  Now you can place multiple vi’s under the FPGA Target node, but for each “Build Specification” that you create, you can only have one top-level vi.  Each build specification will end up creating 1 bitfile.  If your vi references or uses other vi’s, those dependencies will automatically be included in your bitfile.  This way you can have one top-level vi that uses other vi’s in the same project.  This comes handy when you have a complex application that you want to have wrapper test vis around.

Step 4 – Create an FPGA VI

Right-click on the “FPGA Target” and select “New->Vi”

Save VI

Saved VI

Save VI

Name the VI

Now save this vi, and you have a blank FPGA project! Now that’s good, what about the Adder part?

Step 5 – Create a Single-Cycle Timed Loop

Now you can place a bunch of controls, indicators and logic inside the FPGA, but if you do not put it inside of a loop, that code will execute only once.  We want to be able to keep using the Adder that is inside the FPGA over and over again, so we will place the logic inside of a loop.  The default speed of a LabVIEW FPGA loop is 40 MHz.  You can increase the speed, but I recommend you start creating your application at 40MHz, and as your performance requirements increase to also increase the loop speed.  Also note that after a certain speed, you will have to make a choice between how much you do on each clock cycle and how much logic you put in there.

So right-click on the background of the Block Diagram and select the following:

Programming->Structures->Timed Structures->Timed Loop

Create Single Cycle Timed Loop

Drag your mouse and make sure the loop takes up a good amount of space:

Place Single Cycle Timed Loop

Place Single Cycle Timed Loop

Now create the logic using regular LabVIEW controls and indicators.  (I left the gory details out for this step, as the intended audience is users with some LabVIEW experience, so if the details would have helped you, please leave a comment and I will add them here.)

Place Controls and Indicators

On the block diagram, wire them up as so:

Wire Them Up

Step 6 – Run in Simulation Mode

Right click on the FPGA Target, and select “Simulation (Simulated I/O)”:

Set Simulation Mode

And click “Run” on the Front Panel and the FPGA is now running in simulation mode!

Change the values in the controls, and watch the value in the indicator change.  Note that simulation mode runs a lot slower than when running on the actual FPGA target.

Run in Simulation Mode

Video

Watch the following video for a quick demonstration on how to create a simple LabVIEW FPGA project with a single-cycle timed loop that has 2 controls and 1 indicator that displays the sum of the values written to the controls.  The video also includes a demonstration for compiling the vi to a bitstream and for running it on live FPGA hardware.

Download Code:

www.quantprogrammer.com/Code/SampleProject.zip

The LabVIEW FPGA module is a great tool if you want to learn how to program FPGAs.  For the most basic project, you can...

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Setting Up And Accessing the NI PXIe-6592R High Speed Serial Board from National Instruments

I recently received a brand new PXIe-6592R High Speed Serial Board from National Instruments, along with a PXIe chassis with an integrated controller. Here is a list of the hardware:

The PXIe-8105 embedded controller came with the “High Temperature Option”, which means that only a PATA (IDE) hard drive interface is available, with no SATA hard drive support.  Too bad I have a bunch of spare 256GB and 512GB Solid State Drives, but all of them are SATA, so I am stuck with the 128GB PATA ssd from Kingston which the previous owner had installed.  The previous owner also upgraded the memory to the full 4GB and replaced the processor with an Intel Core 2 T7400 with 2.16GHz, which I was told is the best processor which the embedded controller supports.

As for virtualization, VT-d is not supported by the onboard chipset or the processor.  VT-d is an Intel virtualization technology, which allows a virtual machine to directly access the underlying hardware of a machine, giving near native performance.

PXIe-1062Q PXI Express Chassis (Quiet-edition)

pxie-1062q_3

PXIe-8105 Embedded Controller

PXIe-6592R – High-Speed Serial Module

Setting It Up

I am looking at the front of the chassis and I see some annotations for each chassis slot number, as you can see in the picture below, some have a solid black background, some have an H next to the solid black background, others have a clear background, and one is inside a box.

pxie-1062q_3

The product manual for the NI PXIe-1062Q (see page 1-4: http://www.ni.com/pdf/manuals/371843d.pdf) and describes what each annotation mean:

– The H stands for a Hybrid Peripheral Slot
– The square around the circle indicates a PXI System Express Timing Slot – you would want to plug in an IEEE-1588 card here.
– The solid white (slots 2, 6, 7, and 8) are for regular PXI Peripherals

So I can plug the board in to slot 3, 4, or 5. Slots 3 and 5 are Hybrid, and slot 4 is meant for timing, so I will plug the board in to slot #5 and turn the chassis on. Before attempting to plug the board in, make sure you remove the black plastic screw covers:

pxie-6592r_plastic

Here is a picture of the chassis with the 6592R plugged in:

full_system

I have a clean install of Windows 7 on the PXIe-8105 embedded controller and install the following National Instruments packages:

After rebooting several times, I get a notification from the NI Update Service that there are many available updates. **NOTE** Do not install any updates to NI MAX – The drivers for the 6592R will not install (or work) if you upgrade NI MAX past version 15.0.

Now I run NI MAX (National Instruments Measurement & Automation Explorer), click on “My System->Devices and Interfaces->NI PXIe-1062 ‘Chassis 1′” and I see an entry for the 6592 “NI PXIe-6592R ‘PXI1Slot5′”, which is exactly where I plugged the board in.  After clicking on the device, you will want to look at the right-pane and to get the “RIO Resource Name” which will most likely be RIO0.

Watch the following video for a live demonstration of this:

I recently received a brand new PXIe-6592R High Speed Serial Board from National Instruments, along with a PXIe chassis...

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